The locations of transistors within integrated circuits tend to be unevenly distributed in semiconductor chips. For instance, the transistors may be more densely packed in the center of a semiconductor chip than at the edges. Polysilicon Conductor (PC) perimeter density (i.e., edge density) provides a measure of this density. More specifically, PC perimeter density is determined by measuring the PC perimeter lengths within a unit area of semiconductor chip.
The performance of field effect transistors (FETS) in integrated circuits (IC) varies in relation to the PC perimeter density. FETS placed in high PC perimeter density regions (i.e., high PDen regions) tend to operate faster than cells in low density regions (e.g., low PDen). When the PC perimeter density in a given region is high, FETS in that region generally have relatively low threshold voltages and relatively short effective channel lengths and, consequently, have relatively short delay times. On the other hand, when the PC perimeter density in a given region is low, FETS in that region generally have relatively high threshold voltages and relatively long effective channel lengths, and, thus, relatively long delay times. Accordingly, the FETS included in a cell (e.g., a NAND gate) within a high PC perimeter density area may operate faster than another instance of the cell in a lower PC perimeter density area. These systemic process variations produce timing offsets between signals traveling through different density regions.
One technique for avoiding such systemic process variations involves making the PC perimeter densities across an IC uniform across so timing offsets between synchronous circuits are minimized. However, by making the PC perimeter density uniform, the timing constraints of particular circuits may be narrowed and/or exceeded. For instance, decreasing the PC perimeter density in region may reduce timing slack in for a signal path that traverses the region. In addition, increasing the PC perimeter density may increase the speed of a signal path such that a race condition is created.
Accordingly, there exists a need in the art to overcome the deficiencies and limitations described hereinabove.